diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2017-09-20 13:46:19 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-03 20:22:58 +0000 |
| commit | a9b5a393955d2731eb20e3312b95859a55d6230d (patch) | |
| tree | 00ffa99e0a7869465d86adde4904c09b4dcbc02e /src/soc/intel/common/block/lpc/lpc_def.h | |
| parent | 51bfc594bb619cc3f2964e53ee814d4bd14c0d5b (diff) | |
soc/intel/common/block: Update LPC lib
Add support for following functionality:
1. Set up PCH LPC interrupt routing.
2. Set up generic IO decoder range settings.
3. Enable CLKRUN_EN for power gating LPC.
Change-Id: Ib9359765f7293210044b411db49163df0418070a
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/21605
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/lpc/lpc_def.h')
| -rw-r--r-- | src/soc/intel/common/block/lpc/lpc_def.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/lpc/lpc_def.h b/src/soc/intel/common/block/lpc/lpc_def.h index da73608a70..c066f68f17 100644 --- a/src/soc/intel/common/block/lpc/lpc_def.h +++ b/src/soc/intel/common/block/lpc/lpc_def.h @@ -31,7 +31,6 @@ #define LPC_LGIR_ADDR_MASK 0xfffc #define LPC_LGIR_EN (1 << 0) #define LPC_LGIR_MAX_WINDOW_SIZE 256 -#define LPC_NUM_GENERIC_IO_RANGES 4 #define LPC_GENERIC_MEM_RANGE 0x98 #define LPC_LGMR_ADDR_MASK 0xffff0000 #define LPC_LGMR_EN (1 << 0) |