diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2023-01-10 15:05:07 +0530 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-01-15 01:57:18 +0000 |
| commit | dd7d51d12f4cc305ba3d211468f23563acd1f6f1 (patch) | |
| tree | 61e821c20b2701c22d4adf4c25a0f7bc6c7109bd /src/soc/intel/common/block/include | |
| parent | ad6d3128f87c47369f015122ae3e9905de7a0df9 (diff) | |
soc/intel/common: Use 'enum cb_err' values
The patch uses cb_err enum values as return values for function
cse_get_boot_performance_data() instead of true/false.
TEST=Build code for Gimble
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I0153d5496c96fb0c2a576eef1fe2fa7fa0db8415
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 356df0560d..422f69c1c6 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -524,7 +524,7 @@ bool skip_cse_sub_part_update(void); * This command retrieves a set of boot performance timestamps CSME collected during * the last platform boot flow. */ -bool cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf); +enum cb_err cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf); /* Function to make cse disable using PMC IPC */ bool cse_disable_mei_devices(void); |