diff options
author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2019-03-20 11:38:01 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-28 06:39:38 +0000 |
commit | cc7cdb19b10fa9b51acf8bc0fa94d202ffa214f3 (patch) | |
tree | 37efa9429117e94b7a27b25117a4f7bb084cd034 /src/soc/intel/common/block/include | |
parent | e2ac5b7a36cd0583a6b62dac4f8dae5529f44b74 (diff) |
soc/intel/common: Move support to log XHCI wake events
The policy to identify and log the XHCI wake events is similar between
skylake and apollolake. Hence move the similar parts to a common
location.
BUG=b:123429132
BRANCH=None
TEST=Ensure that the system boots to ChromeOS. Ensure that the wake up
events due to USB are logged into the event logs.
6 | 2019-03-21 09:22:18 | S0ix Enter
7 | 2019-03-21 09:22:22 | S0ix Exit
8 | 2019-03-21 09:22:22 | Wake Source | PME - XHCI (USB 2.0 port) | 9
9 | 2019-03-21 09:22:22 | Wake Source | GPE # | 13
10 | 2019-03-21 09:23:20 | ACPI Enter | S3
11 | 2019-03-21 09:23:30 | Wake Source | PME - XHCI (USB 2.0 port) | 9
12 | 2019-03-21 09:23:30 | ACPI Wake | S3
13 | 2019-03-21 09:23:30 | Wake Source | GPE # | 13
Change-Id: Ia6643342e3292984e422ff3c3fcd4bc0d99f947e
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31999
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/xhci.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h index 32ae9a2a05..86b598fda1 100644 --- a/src/soc/intel/common/block/include/intelblocks/xhci.h +++ b/src/soc/intel/common/block/include/intelblocks/xhci.h @@ -16,6 +16,34 @@ #ifndef SOC_INTEL_COMMON_BLOCK_XHCI_H #define SOC_INTEL_COMMON_BLOCK_XHCI_H +#include <device/device.h> + +/** + * struct xhci_usb_info - Data containing number of USB ports & offset. + * @usb2_port_status_reg: Offset to USB2 port status register. + * @num_usb2_ports: Number of USB2 ports. + * @usb3_port_status_reg: Offset to USB3 port status register. + * @num_usb3_ports: Number of USB3 ports. + */ +struct xhci_usb_info { + uint32_t usb2_port_status_reg; + uint32_t num_usb2_ports; + uint32_t usb3_port_status_reg; + uint32_t num_usb3_ports; +}; + +/** + * pch_xhci_update_wake_event() - Identify and log XHCI wake events. + * @info: Information about number of USB ports and their status reg offset. + * + * This function goes through individual USB port status registers within the + * XHCI block and identifies if any of those USB ports triggered a wake-up and + * log information about those ports to the event log. + * + * Return: True if any port is identified as a wake source, false if none. + */ +bool pch_xhci_update_wake_event(const struct xhci_usb_info *info); + void soc_xhci_init(struct device *dev); #endif /* SOC_INTEL_COMMON_BLOCK_XHCI_H */ |