diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-09-07 10:08:35 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-09-12 08:11:17 +0000 |
| commit | a6a5b25ce4235c4e645d3dc20f8222b1a81c54a3 (patch) | |
| tree | 43012c868fbcf120826c93b486a842c6497b3030 /src/soc/intel/common/block/include | |
| parent | e09917641217fea20257ba88fb7ab29912be22ea (diff) | |
cpu/intel: Move is_tme_supported() from soc/intel to cpu/intel
It makes the detection of this feature accessible without the
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU dependency.
BUG=288978352
TEST=compilation
Change-Id: I005c4953648ac9a90af23818b251efbfd2c04043
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77697
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index cbc9e449de..5601d5d067 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -191,14 +191,6 @@ void enable_pm_timer_emulation(void); void init_core_prmrr(void); /* - * Check if TME is supported by the CPU - * - * coreboot shall detect the existence of TME feature by running CPUID instruction: - * CPUID leaf 7/sub-leaf 0: Return Value in ECX [bit 13] = 1 - */ -bool is_tme_supported(void); - -/* * Set TME core activate MSR * * Write zero to TME core activate MSR will translate the TME_ACTIVATE[MK_TME_KEYID_BITS] |