diff options
| author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2019-12-19 23:36:47 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-14 05:37:17 +0000 |
| commit | 9faab3122e13d767bd95dd0887235a368e94d573 (patch) | |
| tree | 8a6e0e5af7db5bd178bc68f1b99c7a4587100293 /src/soc/intel/common/block/include | |
| parent | 7377cda6089210068b9d163083e6084439aa3e88 (diff) | |
soc/intel/common/block: Enable PMC IPC driver
In order for USB Type-C devices to be detected prior to loading Kernel
PMC IPC driver API is needed to send IPC commands to the PMC to update
connection/disconnection states.
BUG=b:151731851
BRANCH=none
TEST=built coreboot image and booted to Chrome OS
Change-Id: Ide3528975be23585ce305f6cc909767b96af200f
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pmc_ipc.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h b/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h new file mode 100644 index 0000000000..0c90cd7df6 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_INTEL_COMMON_BLOCK_PMC_IPC_H +#define SOC_INTEL_COMMON_BLOCK_PMC_IPC_H + +#include <types.h> + +#define PMC_IPC_BUF_COUNT 4 + +#define PMC_IPC_CMD_COMMAND_SHIFT 0 +#define PMC_IPC_CMD_COMMAND_MASK 0xff +#define PMC_IPC_CMD_MSI_SHIFT 8 +#define PMC_IPC_CMD_MSI_MASK 0x01 +#define PMC_IPC_CMD_SUB_COMMAND_SHIFT 12 +#define PMC_IPC_CMD_SUB_COMMAND_MASK 0x0f +#define PMC_IPC_CMD_SIZE_SHIFT 16 +#define PMC_IPC_CMD_SIZE_MASK 0xff + +#define PMC_IPC_CMD_FIELD(name, val) \ + (((val) & PMC_IPC_CMD_##name##_MASK << PMC_IPC_CMD_##name##_SHIFT)) + +#define PMC_IPC_CMD_NO_MSI 0 + +/* + * Create the IPC CMD to send to PMC + */ +static inline uint32_t pmc_make_ipc_cmd(uint32_t cmd, uint32_t subcmd, + uint32_t size) +{ + return PMC_IPC_CMD_FIELD(COMMAND, cmd) | + PMC_IPC_CMD_FIELD(SUB_COMMAND, subcmd) | + PMC_IPC_CMD_FIELD(MSI, PMC_IPC_CMD_NO_MSI) | + PMC_IPC_CMD_FIELD(SIZE, size); +} + +/* + * Buffer for holding write and read buffers of IPC commands + */ +struct pmc_ipc_buffer { + uint32_t buf[PMC_IPC_BUF_COUNT]; +}; + +/* + * Send PMC IPC command + */ +enum cb_err pmc_send_ipc_cmd(uint32_t cmd, const struct pmc_ipc_buffer *wbuf, + struct pmc_ipc_buffer *rbuf); + +#endif /* SOC_INTEL_COMMON_BLOCK_PMC_IPC_H */ |