soc/intel/common/block: Don't use device_t in ramstage

Use of device_t has been abandoned in ramstage.

Change-Id: If2d643eafea854563f56a7f867b7b492b6d09a19
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28631
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

3 files changed, 4 insertions, 4 deletions

diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index f58f914757..6b1b9bd547 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -42,7 +42,7 @@ void soc_write_sci_irq_select(uint32_t scis);
  * Calls acpi_write_hpet which creates and fills HPET table and
  * adds it to the RSDT (and XSDT) structure.
  */
-unsigned long southbridge_write_acpi_tables(device_t device,
+unsigned long southbridge_write_acpi_tables(struct device *device,
 					    unsigned long current,
 					    struct acpi_rsdp *rsdp);
 
@@ -50,7 +50,7 @@ unsigned long southbridge_write_acpi_tables(device_t device,
  * Creates acpi gnvs and adds it to the DSDT table.
  * GNVS creation is chipset specific and is done in soc specific acpi.c file.
  */
-void southbridge_inject_dsdt(device_t device);
+void southbridge_inject_dsdt(struct device *device);
 
 /*
  * This function populates the gnvs structure in acpi table.
diff --git a/src/soc/intel/common/block/include/intelblocks/graphics.h b/src/soc/intel/common/block/include/intelblocks/graphics.h
index f489e27a7b..6be766125c 100644
--- a/src/soc/intel/common/block/include/intelblocks/graphics.h
+++ b/src/soc/intel/common/block/include/intelblocks/graphics.h
@@ -34,7 +34,7 @@ void graphics_soc_init(struct device *dev);
 /*
  * Write ASL entry for Graphics opregion
  * Input:
- * device_t device: device structure
+ * struct device *device: device structure
  * current: start address of graphics opregion
  * rsdp: pointer to RSDT (and XSDT) structure
  *
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index 4ad51d05d8..c5677e49f3 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -75,7 +75,7 @@ void get_microcode_info(const void **microcode, int *parallel);
  * In this function SOC must perform CPU feature programming
  * during Ramstage phase.
  */
-void soc_core_init(device_t dev);
+void soc_core_init(struct device *dev);
 
 /*
  * In this function SOC must fill required mp_ops params, also it