diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-06-13 00:44:44 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-06-15 07:38:47 +0000 |
| commit | 272ce9a5796ef63516733ab2c25ece39d0ab194f (patch) | |
| tree | af407229402091c4c8e9bf414ba8a4d320c6ac55 /src/soc/intel/common/block/include | |
| parent | cacdb859795a2861223275dde99b1f744130ba2a (diff) | |
{driver, mb, soc}: Rename Intel CSE FPT config to ISH FW version config
This patch renames `SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION` config
to `SOC_INTEL_STORE_ISH_FW_VERSION` to ensure the usage of this config
is clear.
Any platform would like to fetch the currently running ISH firmware
version should select this configuration.
TEST=Able to build and boot google/marasov.
Change-Id: Ie503d6a5bf5bd0d3d561355b592e75b22c910bf5
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75767
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 23a449086c..636b1f4064 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -528,7 +528,7 @@ void soc_disable_heci1_using_pcr(void); * identifying the UFS enabled device is enough to conclude if ISH partition is * available. */ -#if CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION) +#if CONFIG(SOC_INTEL_STORE_ISH_FW_VERSION) bool soc_is_ish_partition_enabled(void); #else static inline bool soc_is_ish_partition_enabled(void) |