diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-03-13 13:41:43 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-23 13:53:10 +0000 |
| commit | 0e1be046acaf5cfb9e2c41521270d137fa3423c5 (patch) | |
| tree | e8a834e544b77d60025c6a553d34ccffd1341ddd /src/soc/intel/common/block/include | |
| parent | e32565cd2d6447ebee9a55580b905026582f9a76 (diff) | |
soc/intel/cmn/cse: Make heci_(send|receive) public functions
Having these two functions public allow "asynchronous"
HECI command implementation.
Typically, these function can be use to implement an asynchronous
End-Of-Post.
BUG=b:268546941
BRANCH=firmware-brya-14505.B
TEST=Successful compilation for brya0
Change-Id: I7d029bb9af4b53f219018e459d17df9c1bd33fc1
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 4634984756..c87946ffec 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -345,6 +345,24 @@ void cse_init(uintptr_t bar); void heci_init(void); /* + * Send message msg of size len to host from host_addr to cse_addr. + * Returns CSE_TX_RX_SUCCESS on success and other enum values on failure scenarios. + * Also, in case of errors, heci_reset() is triggered. + */ +enum cse_tx_rx_status heci_send(const void *msg, size_t len, uint8_t host_addr, + uint8_t client_addr); + +/* + * Receive message into buff not exceeding maxlen. Message is considered + * successfully received if a 'complete' indication is read from ME side + * and there was enough space in the buffer to fit that message. maxlen + * is updated with size of message that was received. + * Returns CSE_TX_RX_SUCCESS on success and other enum values on failure scenarios. + * Also, in case of errors, heci_reset() is triggered. + */ +enum cse_tx_rx_status heci_receive(void *buff, size_t *maxlen); + +/* * Send message from BIOS_HOST_ADDR to cse_addr. * Sends snd_msg of size snd_sz, and reads message into buffer pointed by * rcv_msg of size rcv_sz |