diff options
| author | Marc Jones <marcjones@sysproconsulting.com> | 2021-01-21 11:32:34 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-26 10:34:52 +0000 |
| commit | 08de06ad6dc5530c23eced8363b15f5324ec41b1 (patch) | |
| tree | e39a16778857ff7d0a107e74d4d0049cfc1ba6da /src/soc/intel/common/block/include | |
| parent | 3c18186e76c0e27590f54c3ae39c7b951ac28749 (diff) | |
soc/intel: Move c-state resource define
De-duplicate the MWAIT_RES define. Move it to intel/common/block.
Change-Id: I43903e4f02a549f53101e79f6febd42f2e54f98f
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49802
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/acpi.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h index d76d95ab11..90d5e5e522 100644 --- a/src/soc/intel/common/block/include/intelblocks/acpi.h +++ b/src/soc/intel/common/block/include/intelblocks/acpi.h @@ -23,6 +23,16 @@ uint32_t soc_read_sci_irq_select(void); /* Write the scis from soc specific register. */ void soc_write_sci_irq_select(uint32_t scis); +/* _CST MWAIT resource used by cstate_map. */ +#define MWAIT_RES(state, sub_state) \ + { \ + .addrl = (((state) << 4) | (sub_state)), \ + .space_id = ACPI_ADDRESS_SPACE_FIXED, \ + .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ + .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \ + } + /* * get_cstate_map returns a table of processor specific acpi_cstate_t entries * and number of entries in the table |