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authorArthur Heymans <arthur@aheymans.xyz>2022-05-09 14:33:15 +0200
committerArthur Heymans <arthur@aheymans.xyz>2022-05-16 06:53:46 +0000
commit08769c6d1404c1be0333273d8b988544750ce87d (patch)
treeef37aeb920efea81b84ecf50c2ab990c09541b30 /src/soc/intel/common/block/include
parent159520ed7881d1be2fdd02ee13040e8e21a9833c (diff)
soc/intel/*: Use SSDT to pass A4GB and A4GS
GNVS is more fragile as you need to keep struct elements in sync with ASL code. Change-Id: I2cd5e6b56e4a0dbbb11f4a0ac97e8f84d53b90ec Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/nvs.h4
-rw-r--r--src/soc/intel/common/block/include/intelblocks/systemagent.h5
2 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h
index 5adbdb8550..4fc5b4c4c8 100644
--- a/src/soc/intel/common/block/include/intelblocks/nvs.h
+++ b/src/soc/intel/common/block/include/intelblocks/nvs.h
@@ -24,9 +24,7 @@ struct __packed global_nvs {
u16 u2we; /* 0x2b - 0x2c USB2 Wake Enable Bitmap */
u16 u3we; /* 0x2d - 0x2e USB3 Wake Enable Bitmap */
u8 uior; /* 0x2f - UART debug controller init on S3 resume */
- u64 a4gb; /* 0x30 - 0x37 Base of above 4GB MMIO Resource */
- u64 a4gs; /* 0x38 - 0x3f Length of above 4GB MMIO Resource */
- u64 hest_log_addr; /* 0x40 - 47 err log addr (used in SMM, not ASL code) */
+ u64 hest_log_addr; /* 0x30 - 0x37 err log addr (used in SMM, not ASL code) */
};
#endif
diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
index f708fae674..174c1a6d35 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
@@ -77,8 +77,6 @@ uintptr_t sa_get_gsm_base(void);
uintptr_t sa_get_tseg_base(void);
/* API to get TSEG size */
size_t sa_get_tseg_size(void);
-/* Fill MMIO resource above 4GB into GNVS */
-void sa_fill_gnvs(struct global_nvs *gnvs);
/* API to lock PAM registers */
void sa_lock_pam(void);
@@ -104,4 +102,7 @@ int soc_get_uncore_prmmr_base_and_mask(uint64_t *base, uint64_t *mask);
/* Returns the maximum supported capacity of a channel as encoded by DDRSZ in MiB */
uint32_t soc_systemagent_max_chan_capacity_mib(u8 capid0_a_ddrsz);
+/* To be called in the acpi_fill_ssdt op of the domain */
+void ssdt_set_above_4g_pci(const struct device *dev);
+
#endif /* SOC_INTEL_COMMON_BLOCK_SA_H */