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authorMichael Niewöhner <foss@mniewoehner.de>2021-11-03 19:55:03 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-11-11 19:29:21 +0000
commitcfa59206a8780d1de99bb22e54830fc03284c083 (patch)
treea62b4a5ee5c2eb61ae14a9adda416438faf956ed /src/soc/intel/common/block/include/intelblocks
parent7c088b70ab230df3e4745fc2268f3ec9bd460c14 (diff)
soc/intel: move SGX ACPI code to block/acpi
Move SGX ACPI code to block/acpi. Also move the register definitions there, since they are misplaced in intelblocks/msr.h and are used only once anyways. Change-Id: I089d0ee97c37df2be060b5996183201bfa9b49ca Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58925 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/acpi.h3
-rw-r--r--src/soc/intel/common/block/include/intelblocks/msr.h8
-rw-r--r--src/soc/intel/common/block/include/intelblocks/sgx.h8
3 files changed, 8 insertions, 11 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index 02a9da58cf..2d3136eae6 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -105,4 +105,7 @@ void generate_acpi_power_engine(void);
substate requirements */
void generate_acpi_power_engine_with_lpm(const struct soc_pmc_lpm *lpm);
+/* Fill SSDT for SGX status, EPC base and length */
+void sgx_fill_ssdt(void);
+
#endif /* _SOC_INTEL_COMMON_BLOCK_ACPI_H_ */
diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h
index 2e12bf071d..e45b34dfec 100644
--- a/src/soc/intel/common/block/include/intelblocks/msr.h
+++ b/src/soc/intel/common/block/include/intelblocks/msr.h
@@ -108,13 +108,5 @@
#define SMRR_LOCK_SUPPORTED (1<<14)
#define SGX_SUPPORTED (1<<2)
-/* Intel SDM: Table 36-6.
- * CPUID Leaf 12H, Sub-Leaf Index 2 or Higher for enumeration of
- * SGX Resources. Same Table mentions about return values of the CPUID */
-#define SGX_RESOURCE_ENUM_CPUID_LEAF (0x12)
-#define SGX_RESOURCE_ENUM_CPUID_SUBLEAF (0x2)
-#define SGX_RESOURCE_ENUM_BIT (0x1)
-#define SGX_RESOURCE_MASK_LO (0xfffff000UL)
-#define SGX_RESOURCE_MASK_HI (0xfffffUL)
#endif /* SOC_INTEL_COMMON_MSR_H */
diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h
index fc7282f011..3099faffba 100644
--- a/src/soc/intel/common/block/include/intelblocks/sgx.h
+++ b/src/soc/intel/common/block/include/intelblocks/sgx.h
@@ -6,6 +6,11 @@
#include <soc/nvs.h>
/*
+ * Check if SGX is supported
+ */
+int is_sgx_supported(void);
+
+/*
* Configure core PRMRR.
* PRMRR needs to configured first on all cores and then
* call sgx_configure() for all cores to init SGX.
@@ -17,7 +22,4 @@ void prmrr_core_configure(void);
*/
void sgx_configure(void *unused);
-/* Fill SSDT for SGX status, EPC base and length */
-void sgx_fill_ssdt(void);
-
#endif /* SOC_INTEL_COMMON_BLOCK_SGX_H */