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authorSridhar Siricilla <sridhar.siricilla@intel.com>2019-08-30 17:10:24 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-09-09 13:32:54 +0000
commita5208f575fa98b8ebcd3e410cd367a682150a77d (patch)
treeb3d19ab36570a81894590e3e9a3f327b56ee8559 /src/soc/intel/common/block/include/intelblocks
parent13e902d5718ef57571ec3c0e4f08c9368b6766cc (diff)
soc/intel/common/block/cse: Add helper function heci_send_receive
Aggregate sending and receiving HECI messages into a single function. TEST=Verified sending and receiving reply HECI message on CML RVP & Hatch board Change-Id: Ic95239eef8591d3aadf56a857c97f3f1e12b16ac Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35224 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/cse.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index d7c4d9f93e..424d483cfa 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -37,6 +37,14 @@ int heci_receive(void *buff, size_t *maxlen);
*/
int
heci_send(const void *msg, size_t len, uint8_t host_addr, uint8_t cse_addr);
+
+/*
+ * Sends snd_msg of size snd_sz, and reads message into buffer pointed by
+ * rcv_msg of size rcv_sz
+ * Returns 0 on failure a 1 on success.
+ */
+int heci_send_receive(const void *snd_msg, size_t snd_sz, void *rcv_msg, size_t *rcv_sz);
+
/*
* Attempt device reset. This is useful and perhaps only thing left to do when
* CPU and CSE are out of sync or CSE fails to respond.