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authorSubrata Banik <subrata.banik@intel.com>2018-01-10 10:51:50 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-01-17 17:47:33 +0000
commit888520622b65bc0eabd55d04c314ffc1b0ed5b7e (patch)
treed2a82b65a338f334697c055418a48d78d4c149ab /src/soc/intel/common/block/include/intelblocks
parent7410f8be8fc3c5f9bceb61c0c61e02c697968cbd (diff)
soc/intel/common: Add option to pass SoC IO resource
This patch ensures common block has option to reserve IO resources based on SOC requirements. Also add pch_lpc_ prefix to maintain same function nomenclature across all intel common block. Change-Id: Ic00af688104bcea1aff06be6cbb20208a60e5f1d Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23201 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/lpc_lib.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
index 2b525cab41..554c75d509 100644
--- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
+++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2017 Intel Corp.
+ * Copyright (C) 2017-2018 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -71,7 +71,9 @@ void lpc_open_mmio_window(uintptr_t base, size_t size);
bool lpc_fits_fixed_mmio_window(uintptr_t base, size_t size);
/* Init SoC Spcific LPC features. Common definition will be weak and
each soc will need to define the init. */
-void lpc_init(struct device *dev);
+void lpc_soc_init(struct device *dev);
+/* Fill up LPC IO resource structure inside SoC directory */
+void pch_lpc_soc_fill_io_resources(struct device *dev);
/* Init LPC GPIO pads */
void lpc_configure_pads(void);
/* Get SoC speicific MMIO ranges */
@@ -102,5 +104,8 @@ void soc_get_gen_io_dec_range(const struct device *dev,
uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]);
/* Mirror generic IO decoder range register settings into DMI PCR. */
void soc_setup_dmi_pcr_io_dec(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]);
+/* Add resource into LPC PCI device space */
+void pch_lpc_add_new_resource(struct device *dev, uint8_t offset,
+ uintptr_t base, size_t size, unsigned long flags);
#endif /* _SOC_COMMON_BLOCK_LPC_LIB_H_ */