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authorJulien Viard de Galbert <jviarddegalbert@online.net>2018-03-29 14:01:01 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-01-28 13:33:30 +0000
commit595202c304d14e17b1ea1514169346d7cc637206 (patch)
treedd5d67885d1b40669c11a733178bb3d5f8605052 /src/soc/intel/common/block/include/intelblocks
parent3b0667dd2a386fd13765cb047ef7484ba169a10d (diff)
soc/intel/denverton_ns: Add ACPI T-States and P-States
Also make soc_get_tss_table public and weak instead of static in intelblock so it can be overridden in denverton. Change-Id: Id9c7da474a81417a5cebd875023f7cd3d5a77796 Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/c/25430 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Vanny E <vanessa.f.eusebio@intel.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: David Guckian Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/acpi.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index 6b1b9bd547..029174f1ff 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -66,6 +66,12 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs);
acpi_cstate_t *soc_get_cstate_map(size_t *num_entries);
/*
+ * get_tstate_map returns a table of processor specific acpi_tstate_t entries
+ * and number of entries in the table
+ */
+acpi_tstate_t *soc_get_tss_table(int *entries);
+
+/*
* Chipset specific quirks for the wake enable bits.
* Returns wake events for the soc.
*/