soc/intel/denverton_ns: Add ACPI T-States and P-States

Also make soc_get_tss_table public and weak instead of static
in intelblock so it can be overridden in denverton.

Change-Id: Id9c7da474a81417a5cebd875023f7cd3d5a77796
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/c/25430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Vanny E <vanessa.f.eusebio@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index 6b1b9bd547..029174f1ff 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -66,6 +66,12 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs);
 acpi_cstate_t *soc_get_cstate_map(size_t *num_entries);
 
 /*
+ * get_tstate_map returns a table of processor specific acpi_tstate_t entries
+ * and number of entries in the table
+ */
+acpi_tstate_t *soc_get_tss_table(int *entries);
+
+/*
  * Chipset specific quirks for the wake enable bits.
  * Returns wake events for the soc.
  */