diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-04-06 11:10:35 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-10 20:46:17 +0200 |
| commit | 237a93c43e9d269926f34839ee88f00833701ce6 (patch) | |
| tree | 47fc3781b00af8ae979942e2c326f77045214366 /src/soc/intel/common/block/include/intelblocks | |
| parent | 8bf69d307892c65cdc604136146c1a6702956e20 (diff) | |
soc/intel/common/block: Add LPSS function library
LPSS function library implements common register
programming under lpss.
Change-Id: I881da01be8191270d9505737f68a6d2d8cd8cc69
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19001
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpss.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h new file mode 100644 index 0000000000..03a47144c8 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/lpss.h @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_COMMON_BLOCK_LPSS_H +#define SOC_INTEL_COMMON_BLOCK_LPSS_H + +#include <stdint.h> + +/* Gets controller out of reset */ +void lpss_reset_release(uintptr_t base); + +/* + * Update clock divider parameters. Clock frequency is + * configured as SOC_INTEL_COMMON_LPSS_CLOCK_MHZ * (M / N) + */ +void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val); + +#endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */ |