diff options
author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-12-01 15:55:06 -0700 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2023-01-12 02:54:09 +0000 |
commit | 47f154c8e593be37ee298e976a37012f44c2a247 (patch) | |
tree | 46831caa6f1ea5920d63d003ff7ca889a7b02d0a /src/soc/intel/common/block/graphics/Makefile.inc | |
parent | ca025203a84f11f365792919e320e1f57c0a5c50 (diff) |
soc/intel/common/block: Add Intel VGA early graphics support
This patch introduces an early graphics driver which can be used in
romstage in cache-as-ram mode. The implementation relies on
`libgfxinit' and provide VGA text mode support.
SoCs wanting to take advantage of this driver must implement the
`early_graphics_soc_panel_init' function to set the panel power
sequence timing parameters.
BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=Graphics bring up observed on skolas with extra patches
Change-Id: Ie4ad1215e5fadd0adc1271b6bd6ddb0ea258cb5b
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70299
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Maulik Vaghela <maulikvaghela@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/graphics/Makefile.inc')
-rw-r--r-- | src/soc/intel/common/block/graphics/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/graphics/Makefile.inc b/src/soc/intel/common/block/graphics/Makefile.inc index ac7df44a2f..ac053de838 100644 --- a/src/soc/intel/common/block/graphics/Makefile.inc +++ b/src/soc/intel/common/block/graphics/Makefile.inc @@ -1,2 +1,3 @@ ## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += early_graphics.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += graphics.c |