diff options
author | Wonkyu Kim <wonkyu.kim@intel.com> | 2021-09-01 23:32:23 -0700 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-16 13:09:58 +0000 |
commit | d107e810c9b188bd313c25638a2878bd4fc61615 (patch) | |
tree | 0bc1da2c77b1d0da1ce0ca6403348634a69f4e35 /src/soc/intel/common/block/gpmr | |
parent | 169302aa7f52c9d9e842700575741a932a64ac99 (diff) |
soc/intel/common: Implement IOC driver
Starting with Meteor Lake SoC, the PCR/DMI interface to program GPMR
is replaced with IOC (I/O Cache), hence, this patch implements IOC
driver to support that migration.
Reference: 643504 MTL FAS section 7.5.2
TEST=Build and boot to OS for TGL RVP and MTL PSS
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: I768027c2ca78310c03845f70f17df19dc8cd0982
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63198
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/gpmr')
-rw-r--r-- | src/soc/intel/common/block/gpmr/gpmr.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/gpmr/gpmr.c b/src/soc/intel/common/block/gpmr/gpmr.c index 6c809a5cb8..1b2a2d1e4d 100644 --- a/src/soc/intel/common/block/gpmr/gpmr.c +++ b/src/soc/intel/common/block/gpmr/gpmr.c @@ -2,24 +2,34 @@ #include <console/console.h> #include <intelblocks/gpmr.h> +#include <intelblocks/ioc.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> /* GPMR Register read given offset */ uint32_t gpmr_read32(uint16_t offset) { - return pcr_read32(PID_DMI, offset); + if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOC)) + return ioc_reg_read32(offset); + else + return pcr_read32(PID_DMI, offset); } /* GPMR Register write given offset and val */ void gpmr_write32(uint16_t offset, uint32_t val) { - return pcr_write32(PID_DMI, offset, val); + if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOC)) + return ioc_reg_write32(offset, val); + else + return pcr_write32(PID_DMI, offset, val); } void gpmr_or32(uint16_t offset, uint32_t ordata) { - return pcr_or32(PID_DMI, offset, ordata); + if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOC)) + return ioc_reg_or32(offset, ordata); + else + return pcr_or32(PID_DMI, offset, ordata); } /* Check for available free gpmr */ |