diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-04-13 12:13:09 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-20 09:38:46 +0000 |
| commit | 211be9c031d45cb394d92176c3819939b66c53cd (patch) | |
| tree | c4660d7dcd66b866b0951de1047d90767ab50a61 /src/soc/intel/common/block/gpmr | |
| parent | d85e5eb28749a7925c0825311ad5b14b7d8147a5 (diff) | |
soc/intel/cmn/{block, pch}: Migrate GPMR driver
This patch migrates GPMR driver over DMI to accommodate future SOCs
with different interface (other than PCR/DMI).
TEST=Able to build and boot google/redrix.
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I00ac667e8d3f2ccefd8d51a8150a989fc8e5c7e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/common/block/gpmr')
| -rw-r--r-- | src/soc/intel/common/block/gpmr/gpmr.c | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/src/soc/intel/common/block/gpmr/gpmr.c b/src/soc/intel/common/block/gpmr/gpmr.c index d0fe499be0..6c809a5cb8 100644 --- a/src/soc/intel/common/block/gpmr/gpmr.c +++ b/src/soc/intel/common/block/gpmr/gpmr.c @@ -1,21 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <console/console.h> -#include <intelblocks/dmi.h> #include <intelblocks/gpmr.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> -#define MAX_GPMR_REGS 3 - -#define GPMR_OFFSET(x) (0x277c + (x) * 8) -#define DMI_PCR_GPMR_LIMIT_MASK 0xffff0000 -#define DMI_PCR_GPMR_BASE_SHIFT 16 -#define DMI_PCR_GPMR_BASE_MASK 0xffff - -#define GPMR_DID_OFFSET(x) (0x2780 + (x) * 8) -#define DMI_PCR_GPMR_EN BIT(31) - /* GPMR Register read given offset */ uint32_t gpmr_read32(uint16_t offset) { @@ -41,7 +30,7 @@ static int get_available_gpmr(void) for (i = 0; i < MAX_GPMR_REGS; i++) { val = gpmr_read32(GPMR_DID_OFFSET(i)); - if (!(val & DMI_PCR_GPMR_EN)) + if (!(val & GPMR_EN)) return i; } printk(BIOS_ERR, "%s: No available free gpmr found\n", __func__); @@ -49,12 +38,12 @@ static int get_available_gpmr(void) } /* Configure GPMR for the given base and size of extended BIOS Region */ -enum cb_err dmi_enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) +enum cb_err enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) { int gpmr_num; uint32_t limit; - if (base & ~(DMI_PCR_GPMR_BASE_MASK << DMI_PCR_GPMR_BASE_SHIFT)) { + if (base & ~(GPMR_BASE_MASK << GPMR_BASE_SHIFT)) { printk(BIOS_ERR, "base is not 64-KiB aligned!\n"); return CB_ERR; } @@ -66,7 +55,7 @@ enum cb_err dmi_enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) return CB_ERR; } - if ((limit & ~DMI_PCR_GPMR_LIMIT_MASK) != 0xffff) { + if ((limit & ~GPMR_LIMIT_MASK) != 0xffff) { printk(BIOS_ERR, "limit does not end on a 64-KiB boundary!\n"); return CB_ERR; } @@ -77,11 +66,11 @@ enum cb_err dmi_enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) return CB_ERR; /* Program Range for the given decode window */ - gpmr_write32(GPMR_OFFSET(gpmr_num), (limit & DMI_PCR_GPMR_LIMIT_MASK) | - ((base >> DMI_PCR_GPMR_BASE_SHIFT) & DMI_PCR_GPMR_BASE_MASK)); + gpmr_write32(GPMR_OFFSET(gpmr_num), (limit & GPMR_LIMIT_MASK) | + ((base >> GPMR_BASE_SHIFT) & GPMR_BASE_MASK)); /* Program source decode enable bit and the Destination ID */ - gpmr_write32(GPMR_DID_OFFSET(gpmr_num), dest_id | DMI_PCR_GPMR_EN); + gpmr_write32(GPMR_DID_OFFSET(gpmr_num), dest_id | GPMR_EN); return CB_SUCCESS; } |