diff options
author | Ashish Kumar Mishra <ashish.k.mishra@intel.com> | 2024-02-02 20:18:56 +0530 |
---|---|---|
committer | Shelley Chen <shchen@google.com> | 2024-02-08 06:02:54 +0000 |
commit | 32ebaef73c8e1cc367e1c63af587250041fce32a (patch) | |
tree | cb21b257f38e60eadf225773379ed1384fb1a52b /src/soc/intel/common/block/gpio | |
parent | 33659d246e5d89885413d4ea30525dacdacc56ee (diff) |
mb/google/brox: Handle GPI_INT pin lower to GPI_WAKE
In case where PAD_CFG_GPI_INT() is initialized with a pin value
lower to PAD_CFG_GPI_IRQ_WAKE() for same GPIO community
the set_ioapic_used() is only called for the PAD_CFG_GPI_IRQ_WAKE() pin.
Due to this the IRQ associated with PAD_CFG_GPI_INT() is found free by
find_free_unique_irq() during IRQ assignment and assigned to other pins
which causes IRQ conflicts
BUG=b:322984217
BRANCH=None
TEST=Boot test on brox, check if correct IRQ assigned to EC
Change-Id: I8c3d557e888b8d0ceac203f49b702910fba26d6d
Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80334
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/gpio')
-rw-r--r-- | src/soc/intel/common/block/gpio/gpio.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index 63d59daa57..09ada90ccc 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -276,7 +276,8 @@ static void gpio_configure_itss(const struct pad_config *cfg, uint16_t port, * in the GPIO pad configuration so that a hardware active low * signal looks that way to the APIC (double inversion). */ - if (!(cfg->pad_config[0] & PAD_CFG0_ROUTE_IOAPIC)) + if (!(cfg->pad_config[0] & PAD_CFG0_ROUTE_SWAPPED) && + !(cfg->pad_config[0] & PAD_CFG0_ROUTE_IOAPIC)) return; irq = pcr_read32(port, PAD_CFG1_OFFSET(pad_cfg_offset)); @@ -287,7 +288,8 @@ static void gpio_configure_itss(const struct pad_config *cfg, uint16_t port, return; } - if (CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG)) + if (CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG) && + !(cfg->pad_config[0] & PAD_CFG0_ROUTE_SWAPPED)) itss_set_irq_polarity(irq, !!(cfg->pad_config[0] & PAD_CFG0_RX_POL_INVERT)); |