diff options
author | Tim Chu <Tim.Chu@quantatw.com> | 2022-12-08 09:02:34 +0000 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-10 15:55:02 +0000 |
commit | 6e0c78b87fe4bad7f02b893bf1f1ce8d3bbf84d8 (patch) | |
tree | b8b6aa41f01d97c98a624e618f6bb5d90c0bfa15 /src/soc/intel/common/block/fast_spi | |
parent | ebe7f7cee041ebc4e40de095c4d4f61472213b92 (diff) |
soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
The SPI BIOS decode lock bit needs to be set, according to
Intel EBG EDS dodcumentation.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I3366817b42a5878f16575698ebc546fa7852e285
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src/soc/intel/common/block/fast_spi')
-rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 7 | ||||
-rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi_def.h | 2 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index ed2e8f2b39..4fa10b0bb7 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -457,6 +457,13 @@ void fast_spi_disable_wp(void) pci_write_config8(dev, SPI_BIOS_CONTROL, bios_cntl); } +void fast_spi_set_bde(void) +{ + const pci_devfn_t dev = PCH_DEV_SPI; + + pci_or_config32(dev, SPI_BIOS_DECODE_EN, SPI_BIOS_DECODE_LOCK); +} + void fast_spi_clear_outstanding_status(void) { void *spibar = fast_spi_get_bar(); diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_def.h b/src/soc/intel/common/block/fast_spi/fast_spi_def.h index 4012c29624..af46ccb964 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_def.h +++ b/src/soc/intel/common/block/fast_spi/fast_spi_def.h @@ -4,6 +4,8 @@ #define SOC_INTEL_COMMON_BLOCK_FAST_SPI_DEF_H /* PCI configuration registers */ +#define SPI_BIOS_DECODE_EN 0xd8 +#define SPI_BIOS_DECODE_LOCK BIT(31) #define SPI_BIOS_CONTROL 0xdc |