diff options
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-11-25 21:57:37 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-12-08 22:58:22 +0000 |
| commit | 28e1d0ea551cd37cacbfe7d080345daa6fb3ad91 (patch) | |
| tree | e03feb06a57ad163191d34aadc78e02b56d78bbb /src/soc/intel/common/block/fast_spi | |
| parent | 4eb489fb0f2d2ca3a1da2ad3ca0f608d503182ee (diff) | |
soc/intel/common/fast_spi: Add Lockdown of extended BIOS region
This change adds support to Lock down the configuration of
extended BIOS region. This is done as part of
fast_spi_lockdown_cfg() so that it is consistent with the
other lockdown.
Change includes:
1. New helper function fast_spi_lock_ext_bios_cfg() added that
will basically set EXT_BIOS_LOCK.
BUG=b:171534504
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I730fc12a9c5ca8bb4a1f946cad45944dda8e0518
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48068
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/fast_spi')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 21 | ||||
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi_def.h | 1 |
2 files changed, 18 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index d6e8f53ee4..7859b53318 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -63,19 +63,19 @@ void fast_spi_init(void) /* * Set FAST_SPIBAR BIOS Control register based on input bit field. */ -static void fast_spi_set_bios_control_reg(uint8_t bios_cntl_bit) +static void fast_spi_set_bios_control_reg(uint32_t bios_cntl_bit) { #if defined(__SIMPLE_DEVICE__) pci_devfn_t dev = PCH_DEV_SPI; #else struct device *dev = PCH_DEV_SPI; #endif - uint8_t bc_cntl; + uint32_t bc_cntl; assert((bios_cntl_bit & (bios_cntl_bit - 1)) == 0); - bc_cntl = pci_read_config8(dev, SPIBAR_BIOS_CONTROL); + bc_cntl = pci_read_config32(dev, SPIBAR_BIOS_CONTROL); bc_cntl |= bios_cntl_bit; - pci_write_config8(dev, SPIBAR_BIOS_CONTROL, bc_cntl); + pci_write_config32(dev, SPIBAR_BIOS_CONTROL, bc_cntl); } /* @@ -107,6 +107,19 @@ void fast_spi_set_lock_enable(void) } /* + * Set FAST_SPIBAR BIOS Control EXT BIOS LE bit. + */ +void fast_spi_set_ext_bios_lock_enable(void) +{ + if (!CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW)) + return; + + fast_spi_set_bios_control_reg(SPIBAR_BIOS_CONTROL_EXT_BIOS_LOCK_ENABLE); + + fast_spi_read_post_write(SPIBAR_BIOS_CONTROL); +} + +/* * Set FAST_SPIBAR BIOS Control EISS bit. */ void fast_spi_set_eiss(void) diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_def.h b/src/soc/intel/common/block/fast_spi/fast_spi_def.h index 883c3ce3eb..ce4eb2d7c2 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_def.h +++ b/src/soc/intel/common/block/fast_spi/fast_spi_def.h @@ -14,6 +14,7 @@ /* Bit definitions for BIOS_CONTROL */ #define SPIBAR_BIOS_CONTROL_WPD (1 << 0) #define SPIBAR_BIOS_CONTROL_LOCK_ENABLE (1 << 1) +#define SPIBAR_BIOS_CONTROL_EXT_BIOS_LOCK_ENABLE (1 << 28) #define SPIBAR_BIOS_CONTROL_CACHE_DISABLE (1 << 2) #define SPIBAR_BIOS_CONTROL_PREFETCH_ENABLE (1 << 3) #define SPIBAR_BIOS_CONTROL_EISS (1 << 5) |