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authorSubrata Banik <subratabanik@google.com>2022-03-15 16:51:29 +0530
committerSubrata Banik <subratabanik@google.com>2022-03-17 06:01:49 +0000
commit1f28c853de084c88c42058ac6939db6de659101f (patch)
treebfbc0db8eae52f29bcad856ac87c8b132f2bd402 /src/soc/intel/common/block/fast_spi
parent242e2665d005576a081908873fa7652895e8e60d (diff)
soc/intel/common/fast_spi: support caching `ext_bios` in ramstage
This patch provides a way to cache `ext_bios` region for all stages to save boot time. TEST=Able to see the ext_bios region in MTRR snapshot when cached on the Brya variants. Here is the timestamp snippet showing the payload load time as a comparison between current upstream and the patched version: upstream: 90:starting to load payload 1,072,459 (1,802) 958:calling FspNotify(ReadyToBoot) 12,818,079 (11,745,619) with this patch: 90:starting to load payload 1,072,663 (2,627) 958:calling FspNotify(ReadyToBoot) 5,299,535 (4,226,871) Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I87139a9ed7eb9ed43164a5199aa436dd1219145c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62837 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/common/block/fast_spi')
-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 0e012316d1..7be71a26fb 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -245,10 +245,14 @@ static void fast_spi_cache_ext_bios_window(void)
if (!fast_spi_ext_bios_cache_range(&ext_bios_base, &ext_bios_size))
return;
- int mtrr = get_free_var_mtrr();
- if (mtrr == -1)
- return;
- set_var_mtrr(mtrr, ext_bios_base, ext_bios_size, type);
+ if (ENV_PAYLOAD_LOADER) {
+ mtrr_use_temp_range(ext_bios_base, ext_bios_size, type);
+ } else {
+ int mtrr = get_free_var_mtrr();
+ if (mtrr == -1)
+ return;
+ set_var_mtrr(mtrr, ext_bios_base, ext_bios_size, type);
+ }
}
void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf)