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authorKrishna P Bhat D <krishna.p.bhat.d@intel.corp-partner.google.com>2022-04-20 15:50:06 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-06-30 14:08:01 +0000
commit75a423ed7b3a9d04f02bdc77498b1681e0461ac8 (patch)
tree43b50f270c468457a7955d645bc6f0cfdd897f19 /src/soc/intel/common/block/cse
parentddd66ed204f47850d3f3a607344ec5f20a15528a (diff)
soc/intel/common: Update CSE FW update flow for compressed ME_RW blobs
In the CSE FW update flow, update is triggered when there is a mismatch in CSE versions. CSE RW blob is directly mapped from SPI flash, hashed, compared and then the CSE RW region is updated. However, in the case of compressed blobs, we cannot directly map the blobs from SPI. It needs to be decompressed before the hash is calculated and compared. Add a check for compressed blobs and figure out whether it needs to be directly mapped from SPI or loaded into memory allocated for file in CBMEM, with the provided CBMEM ID. BRANCH=firmware-brya-14505.B Change-Id: I3bc7708c95272e98702bc25b2334e6e64a93da8a Signed-off-by: Krishna P Bhat D <krishna.p.bhat.d@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63743 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/cse')
-rw-r--r--src/soc/intel/common/block/cse/cse_lite.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 83f5eb1e84..a3741ccc6a 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -721,14 +721,20 @@ static enum csme_failure_reason cse_trigger_fw_update(const struct cse_bp_info *
{
enum csme_failure_reason rv;
uint8_t *cbfs_rw_hash;
+ void *cse_cbfs_rw = NULL;
size_t size;
const char *area_name = cse_get_source_rdev_fmap();
if (!area_name)
return CSE_LITE_SKU_RW_BLOB_NOT_FOUND;
- void *cse_cbfs_rw = cbfs_unverified_area_map(area_name,
- CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME, &size);
+ if (CONFIG(SOC_INTEL_CSE_LITE_COMPRESS_ME_RW)) {
+ cse_cbfs_rw = cbfs_unverified_area_cbmem_alloc(area_name,
+ CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME, CBMEM_ID_CSE_UPDATE, &size);
+ } else {
+ cse_cbfs_rw = cbfs_unverified_area_map(area_name,
+ CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME, &size);
+ }
if (!cse_cbfs_rw) {
printk(BIOS_ERR, "cse_lite: CSE CBFS RW blob could not be mapped\n");
return CSE_LITE_SKU_RW_BLOB_NOT_FOUND;