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authorRavi Sarawadi <ravishankar.sarawadi@intel.com>2019-10-21 22:25:04 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-11-05 15:05:22 +0000
commit6b5bf407deb52a900ef0a8a0b99f853be1eb7e82 (patch)
tree283c0d2d098d3439e1558729cbdb35f9721ab6e6 /src/soc/intel/common/block/cse
parent8fc523e3137cfdde970a3c87e22b8bbc586a3f7e (diff)
soc/intel/common: Include Tigerlake device IDs
Add Tigerlake specific CPU, System Agent, PCH, IGD device IDs. BUG=None BRANCH=None TEST=Build 'emerge-tglrvp coreboot' Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Change-Id: I19047354718bdf510dffee4659d885f1313a751b Reviewed-on: https://review.coreboot.org/c/coreboot/+/36225 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/common/block/cse')
-rw-r--r--src/soc/intel/common/block/cse/cse.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 0bd5c72ef5..5eb37611f5 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -754,6 +754,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CNP_H_CSE0,
PCI_DEVICE_ID_INTEL_ICL_CSE0,
PCI_DEVICE_ID_INTEL_CMP_CSE0,
+ PCI_DEVICE_ID_INTEL_TGL_CSE0,
0,
};