diff options
author | V Sowmya <v.sowmya@intel.com> | 2020-11-11 07:04:13 +0530 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-11-18 01:26:23 +0000 |
commit | 338b83c7b840198b537427ade46c54d7ddb217b1 (patch) | |
tree | d791125c9242b0b2b178d1e1774bbc1b19b3497a /src/soc/intel/common/block/cse/cse_lite.c | |
parent | f99055266bf2dba0cd85ade3bb0ba3ddeec5f7c7 (diff) |
soc/intel/common: Generate the CSE RW metadata and add to FW_MAIN_A/B
In the existing implementation CSE RW metadata file is generated by
scripts and to avoid incompitable issues between coreboot and the
scripts this patch adds the follwing changes,
* Move the metadata generation to the coreboot Makefile.
* Add CBFS component type struct to create a metadata file during
the compile time.
* Extract the CSE RW version from SOC_INTEL_CSE_RW_VERSION config
and update the major, minor, hotfix and build versions using the
compile time flags.
* Compute the hash of CSE RW binary in hex format using the openssl
and use the HASH_BYTEARRAY macro to convert the 64 character hex
values into the array.
* Add the me_rw.metadata cbfs file to FW_MAIN_A and FW_MAIN_B
regions.
BUG=b:169077783
TEST= Built for dedede. Verify that metadata file was generated
and added to the FW_MAIN_A/B. Extracted it using cbfstool and
verfied that metadata was generated properly.
Change-Id: I412581400a9606fa17cf4398faffda923f07b320
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel/common/block/cse/cse_lite.c')
-rw-r--r-- | src/soc/intel/common/block/cse/cse_lite.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index edb35c4353..39f2cda4c1 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -9,7 +9,6 @@ #include <intelblocks/cse.h> #include <security/vboot/vboot_common.h> #include <security/vboot/misc.h> -#include <vb2_api.h> #include <soc/intel/common/reset.h> /* CSE RW version size reserved in the CSE CBFS RW binary */ @@ -110,14 +109,6 @@ enum bp_info_flags { BP_INFO_READ_ONLY_CFG = 1 << 2, }; -/* Boot Partition FW Version */ -struct fw_version { - uint16_t major; - uint16_t minor; - uint16_t hotfix; - uint16_t build; -} __packed; - /* CSE boot partition entry info */ struct cse_bp_entry { /* Boot partition version */ |