aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/common/block/cpu/cpulib.c
diff options
context:
space:
mode:
authorShaunak Saha <shaunak.saha@intel.com>2017-08-16 09:54:00 -0700
committerAaron Durbin <adurbin@chromium.org>2017-08-17 23:41:59 +0000
commit5f84310bb1801026b24c57925c8147e33a47a595 (patch)
tree9110ed78389c4e1a1a305d7329dcab19b8cbf204 /src/soc/intel/common/block/cpu/cpulib.c
parent321111774ce013b35641fe6d0e03e693974b4a28 (diff)
soc/intel/common/block: Add functions to common CPU library code
This patch adds few helper functions in CPU common libraray code which are mainly needed for ACPI module. The functions those are moved to cpu common code is removed from common acpi files. TEST= System boots properly and no regression observed. Change-Id: Id34eb7e03069656238ca0cbdf6ce33f116e0e413 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/21051 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/cpu/cpulib.c')
-rw-r--r--src/soc/intel/common/block/cpu/cpulib.c58
1 files changed, 57 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 5920512cd4..2272e69edb 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/acpigen.h>
#include <arch/io.h>
#include <console/console.h>
#include <cpu/intel/turbo.h>
@@ -238,5 +239,60 @@ int cpu_read_topology(unsigned int *num_phys, unsigned int *num_virt)
msr = rdmsr(MSR_CORE_THREAD_COUNT);
*num_virt = (msr.lo >> 0) & 0xffff;
*num_phys = (msr.lo >> 16) & 0xffff;
- return (*num_virt == *num_phys);
+ return (*num_virt == *num_phys);
+}
+
+int cpu_get_coord_type(void)
+{
+ return HW_ALL;
+}
+
+uint32_t cpu_get_min_ratio(void)
+{
+ msr_t msr;
+ /* Get bus ratio limits and calculate clock speeds */
+ msr = rdmsr(MSR_PLATFORM_INFO);
+ return ((msr.hi >> 8) & 0xff); /* Max Efficiency Ratio */
+}
+
+uint32_t cpu_get_max_ratio(void)
+{
+ msr_t msr;
+ uint32_t ratio_max;
+ if (cpu_config_tdp_levels()) {
+ /* Set max ratio to nominal TDP ratio */
+ msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
+ ratio_max = msr.lo & 0xff;
+ } else {
+ msr = rdmsr(MSR_PLATFORM_INFO);
+ /* Max Non-Turbo Ratio */
+ ratio_max = (msr.lo >> 8) & 0xff;
+ }
+ return ratio_max;
+}
+
+uint32_t cpu_get_bus_clock(void)
+{
+ /* CPU bus clock is set by default here to 100MHz.
+ * This function returns the bus clock in KHz.
+ */
+ return CONFIG_CPU_BCLK_MHZ * KHz;
+}
+
+uint32_t cpu_get_power_max(void)
+{
+ msr_t msr;
+ int power_unit;
+
+ msr = rdmsr(MSR_PKG_POWER_SKU_UNIT);
+ power_unit = 2 << ((msr.lo & 0xf) - 1);
+ msr = rdmsr(MSR_PKG_POWER_SKU);
+ return ((msr.lo & 0x7fff) / power_unit) * 1000;
+}
+
+uint32_t cpu_get_max_turbo_ratio(void)
+{
+ msr_t msr;
+ msr = rdmsr(MSR_TURBO_RATIO_LIMIT);
+ return msr.lo & 0xff;
}