diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2024-11-11 17:34:12 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2024-11-14 16:33:44 +0000 |
| commit | 618fbe0d210d50275492521a7c31a04202ef9a7e (patch) | |
| tree | 4da0f2cf6d54aa42d524ca0e7487bc4dc7969e16 /src/soc/intel/common/block/chip | |
| parent | 3d32f915a9c4d60046574690db966d1f14eebe65 (diff) | |
soc/intel/alderlake: Display early Sign of Life for CSE FW Sync
This will ensure that the user is informed about an ongoing CSE FW Sync.
BUG=b:378458829
TEST=Build Brox BIOS image and boot to OS. Ensure that ESOL is displayed
during CSE FW Sync.
Change-Id: I5e7b71da7a98be87361dc7ab9e6c4ae572f61773
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85103
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Diffstat (limited to 'src/soc/intel/common/block/chip')
0 files changed, 0 insertions, 0 deletions