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authorFurquan Shaikh <furquan@google.com>2020-11-25 14:30:15 -0800
committerFurquan Shaikh <furquan@google.com>2020-12-08 22:55:55 +0000
commitb53280ab53e19746be04b67f73f9ce230038b1ee (patch)
treea45a9374bb028a11f462cd5c735c710825b8480b /src/soc/intel/common/block/acpi
parent886f4e862a0b064d1055aeff8f621f3c5d1ce3ac (diff)
soc/intel/common/systemagent: Reserve window used for extended BIOS decoding
This change reserves the window used for extended BIOS decoding as a fixed MMIO resource using read_resources callback in systemagent driver. This ensures that the resource allocator does not allocate from this window. Additionally, this window is also marked as fixed memory region in _CRS for PNP0C02 device. BUG=b:171534504 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I42b5a0ebda2627f72b825551c566cd22dbc5cca7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/acpi')
-rw-r--r--src/soc/intel/common/block/acpi/acpi/northbridge.asl5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl
index b4b746542e..5780f4c799 100644
--- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl
+++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl
@@ -276,6 +276,11 @@ Device (PDRC)
/* FLASH range */
Memory32Fixed (ReadOnly, 0, CONFIG_ROM_SIZE, FIOH)
+#if CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW)
+ /* Extended BIOS window */
+ Memory32Fixed (ReadOnly, CONFIG_EXT_BIOS_WIN_BASE, CONFIG_EXT_BIOS_WIN_SIZE)
+#endif
+
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000)