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authorSean Rhodes <sean@starlabs.systems>2023-05-02 20:54:40 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2023-05-19 17:40:39 +0000
commit4265d5265dfc7bd823bcf5c8c5dded8d06189f69 (patch)
tree7fe39a315586eafd7621e3590f3bf1add8a88d42 /src/soc/intel/common/basecode/ramtop
parent443df453bf01bfd774b18e7d0cd716bfddb6af7c (diff)
soc/intel/common: Correct the check for ramtop length
The `ramtop_table` is 10 bytes long, so adjust the check to account for this. Also, adjust the wording to make it clear what is required to fix it, should the error be shown. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: If2898c4bb22abb1779035aadc08f32898e9a096b Reviewed-on: https://review.coreboot.org/c/coreboot/+/74919 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/common/basecode/ramtop')
-rw-r--r--src/soc/intel/common/basecode/ramtop/ramtop.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/common/basecode/ramtop/ramtop.c b/src/soc/intel/common/basecode/ramtop/ramtop.c
index bf85fa8efc..f6aa4eadd4 100644
--- a/src/soc/intel/common/basecode/ramtop/ramtop.c
+++ b/src/soc/intel/common/basecode/ramtop/ramtop.c
@@ -23,9 +23,9 @@
#error "The `ramtop` CMOS entry needs to be byte aligned, check your cmos.layout."
#endif // CMOS_VSTART_ramtop % 8 != 0
-#if CMOS_VLEN_ramtop != 12
-#error "CMOS length for RAMTOP_CMOS bytes are not correct, check your cmos.layout"
-#endif
+#if CMOS_VLEN_ramtop != (10 * 8)
+#error "The `ramtop` CMOS entry needs to be 10 bytes long, check your cmos.layout."
+#endif // CMOS_VLEN_ramtop != (10 * 8)
#else
#define CMOS_VSTART_ramtop 800