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| author | Shuo Liu <shuo.liu@intel.com> | 2024-02-20 02:21:49 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-03-05 21:40:56 +0000 |
| commit | 07cfe5392a4527db4c1295c0d28c3b5447dc4f95 (patch) | |
| tree | 2a001462010992c27ba11c09fa11650bbb2d23ad /src/soc/intel/common/basecode/include/intelbasecode | |
| parent | dca7eb5125a72f26b15236377a6aa1da053a386d (diff) | |
soc/intel/xeon_sp: Move MEM_ADDR_64MB_SHIFT_BITS to Xeon-SP
Move MEM_ADDR_64MB_SHIFT_BITS from FSP headers to Xeon-SP common layer
to reduce the dependency.
TEST=intel/archercity CRB
Change-Id: I4e1a652ad58233f7514cb9b23813d75144b8d435
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/common/basecode/include/intelbasecode')
0 files changed, 0 insertions, 0 deletions