diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-07-12 09:52:01 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-07-18 05:30:25 +0000 |
| commit | 4a53ba738d9dc8243aa000155e7cf4f382835298 (patch) | |
| tree | a7653cc2072cd5ce355fa6be12d05022f63ce81b /src/soc/intel/common/acpi/pch_pcr.asl | |
| parent | 8554954f9cf23d3858f2826ac11c1d026b8faece (diff) | |
soc/intel/common/acpi: Create helper APIs for common P2SB access
This patch creates a helper library to migrate all the common P2SB
access routines. The PCH P2SB ACPI implementation will now rely on the
common library to perform PCR read/write operations. This will make the
code more modular and easier to maintain.
The helper library provides a single interface for accessing P2SB
registers. This makes it easier to port the code to different platforms,
for example: adding support for PS2B belongs to the IOE die for
Meteor Lake SoC generation.
BUG=b:290856936
TEST=Able to build and boot google/rex.
Change-Id: I0b2e7ea416ca7082f68d0b822ebb9a87025b4a8b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76408
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/acpi/pch_pcr.asl')
| -rw-r--r-- | src/soc/intel/common/acpi/pch_pcr.asl | 43 |
1 files changed, 7 insertions, 36 deletions
diff --git a/src/soc/intel/common/acpi/pch_pcr.asl b/src/soc/intel/common/acpi/pch_pcr.asl index 2a940a3160..d7991c4fd1 100644 --- a/src/soc/intel/common/acpi/pch_pcr.asl +++ b/src/soc/intel/common/acpi/pch_pcr.asl @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <intelblocks/pcr.h> +#include "pcrlib.asl" + +/* APIs to access P2SB inside PCH/SoC die */ /* * Calculate PCR register base at specified PID @@ -8,7 +10,7 @@ */ Method (PCRB, 1, NotSerialized) { - Return (CONFIG_PCR_BASE_ADDRESS + (Arg0 << PCR_PORTID_SHIFT)) + Return (GPCR(PCH_P2SB, Arg0)) } /* @@ -18,12 +20,7 @@ Method (PCRB, 1, NotSerialized) */ Method (PCRR, 2, Serialized) { - OperationRegion (PCRD, SystemMemory, PCRB (Arg0) + Arg1, 4) - Field (PCRD, DWordAcc, NoLock, Preserve) - { - DATA, 32 - } - Return (DATA) + Return (RPCR(PCH_P2SB, Arg0, Arg1)) } /* @@ -34,20 +31,7 @@ Method (PCRR, 2, Serialized) */ Method (PCRA, 3, Serialized) { - OperationRegion (PCRD, SystemMemory, PCRB (Arg0) + Arg1, 4) - Field (PCRD, DWordAcc, NoLock, Preserve) - { - DATA, 32 - } - DATA &= Arg2 - - /* - * After every write one needs to read an innocuous register - * to ensure the writes are completed for certain ports. This is done - * for all ports so that the callers don't need the per-port knowledge - * for each transaction. - */ - PCRR (Arg0, Arg1) + APCR(PCH_P2SB, Arg0, Arg1, Arg2) } /* @@ -58,18 +42,5 @@ Method (PCRA, 3, Serialized) */ Method (PCRO, 3, Serialized) { - OperationRegion (PCRD, SystemMemory, PCRB (Arg0) + Arg1, 4) - Field (PCRD, DWordAcc, NoLock, Preserve) - { - DATA, 32 - } - DATA |= Arg2 - - /* - * After every write one needs to read an innocuous register - * to ensure the writes are completed for certain ports. This is done - * for all ports so that the callers don't need the per-port knowledge - * for each transaction. - */ - PCRR (Arg0, Arg1) + OPCR(PCH_P2SB, Arg0, Arg1, Arg2) } |