diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-06-28 15:41:07 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-06-29 23:15:48 +0200 |
| commit | c14a1a940f06546e0135d2c165d1706e2827818e (patch) | |
| tree | 96b6eeae8227f508d560d0b9de75ed80b1acf1c6 /src/soc/intel/common/Makefile.inc | |
| parent | ed114da4370ebee5126e8faf4eb0f1c9b96b32db (diff) | |
soc/intel/{common,skylake}: provide common NHLT SoC support
The nhlt_soc_serialize() and nhlt_soc_serialize_oem_overrides()
functions should be able to be leveraged on all Intel SoCs
which support NHLT. Therefore provide that functionality and
make skylake use it.
Change-Id: Ib5535cc874f2680ec22554cecaf97b09753cacd0
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15490
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/common/Makefile.inc')
| -rw-r--r-- | src/soc/intel/common/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index 88d5fd2c78..e9ad5082b4 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -20,6 +20,7 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c ramstage-y += vbt.c ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI) += ./acpi/acpi.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c smm-$(CONFIG_SOC_INTEL_COMMON_SMI) += smihandler.c |