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authorFelix Held <felix-coreboot@felixheld.de>2024-01-16 00:50:46 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-25 22:51:15 +0000
commitdc12a3817ae49123fadbe99fcab6c039f3b4b53d (patch)
treeb571b16563f0208c0b2f4bccc669820f98653f98 /src/soc/intel/cannonlake
parente5197e17786a5ebf231e1fd93e45b22fb753df6e (diff)
soc/amd/genoa_poc: rely less on boot state hooks
Call setup_opensil, opensil_entry, and fch_init in the right order from the init method of the SoC's chip operations. This brings this SoC both more in line with the other SoCs and avoids using boot state hooks for this which also makes the sequence in which those functions are called easier to understand. Previously the boot states were used so that setup_opensil was run before configure_mpio which was run before opensil_entry(SIL_TP1), but since configure_mpio is called from setup_opensil, this is no longer necessary. TEST=Onyx still boots to the payload and the MPIO configuration reported from the openSIL code is still the same. The FCH init code now runs before the resource allocation like on the AMD SoCs that rely on FSP. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic752635da5eaa9e333cfb927836f0d260d2ac049 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79985 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/cannonlake')
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