diff options
author | Subrata Banik <subratabanik@google.com> | 2022-04-22 19:48:40 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-27 12:37:43 +0000 |
commit | 2b594816eaa4629e549fcd2ca06f4395806ec78b (patch) | |
tree | 28c7465dd00156d9f86055122df27311853bc9a1 /src/soc/intel/cannonlake | |
parent | 0231ab17616ff519ef52b5b323fc1ce6efc79f61 (diff) |
soc/intel/cmn/lockdown: Perform SA lockdown configuration
`sa_lockdown_cfg` function ensures locking the PAM register hence,
skip dedicated calling into `sa_lock_pam()` from the SoC
`finalize.c` file. Dropped sa_lock_pam() call from ADL/CNL/EHL/JSL
and TGL.
Additionally, this patch enforces SA lockdown configuration for SKL
and ICL as well.
BUG=b:211954778
TEST=Able to build google/brya with these changes.
> localhost ~ # lspci -xxx | less
00:00.0 Host bridge: Device 8086:4601 (rev 04)
Bit 0 for all PAM registers a.k.a, PAMx_0_0_0_PCI.LOCK bit is set
(meaning locked).
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ibd464d2507393ed0c746eb1fbd10e36092ed5599
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r-- | src/soc/intel/cannonlake/finalize.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 541037726e..e45ae9ae98 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -14,7 +14,6 @@ #include <intelblocks/systemagent.h> #include <intelblocks/tco.h> #include <intelblocks/thermal.h> -#include <intelpch/lockdown.h> #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> @@ -83,19 +82,12 @@ static void pch_finalize(void) } -static void sa_finalize(void) -{ - if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) - sa_lock_pam(); -} - static void soc_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); apm_control(APM_CNT_FINALIZE); - sa_finalize(); if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) && CONFIG(SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC)) heci1_disable(); |