diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-12-03 21:53:52 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-12-05 18:07:18 +0000 |
| commit | 02ce837674f50e5fc104b0b41c962eab03c366bf (patch) | |
| tree | 279ddab1bea946144f3fcae45c26fd9159e34975 /src/soc/intel/cannonlake | |
| parent | 9d867af725bcdc3d5d497d449146216b5255181d (diff) | |
soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT
DSX_CFG provides a config option to disable internal pull-down on
AC_PRESENT. This change updates macro name to reflect this correctly.
Change-Id: I620d7da4048178f86de41f3afd98543cf8efc5ce
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/pmc.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 9d6f594e87..fd89339e63 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -77,7 +77,7 @@ struct soc_intel_cannonlake_config { /* Deep Sx Configuration * DSX_EN_WAKE_PIN - Enable WAKE# pin * DSX_EN_LAN_WAKE_PIN - Enable LAN_WAKE# pin - * DSX_EN_AC_PRESENT_PIN - Enable AC_PRESENT pin */ + * DSX_DIS_AC_PRESENT_PD - Disable pull-down on AC_PRESENT pin */ uint32_t deep_sx_config; /* TCC activation offset */ diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h index fd28859fa3..0276d46089 100644 --- a/src/soc/intel/cannonlake/include/soc/pmc.h +++ b/src/soc/intel/cannonlake/include/soc/pmc.h @@ -103,7 +103,7 @@ #define REQ_CNV_NOWAKE_DSX (1 << 4) #define REQ_BATLOW_DSX (1 << 3) #define DSX_EN_WAKE_PIN (1 << 2) -#define DSX_EN_AC_PRESENT_PIN (1 << 1) +#define DSX_DIS_AC_PRESENT_PD (1 << 1) #define DSX_EN_LAN_WAKE_PIN (1 << 0) #define DSX_CFG_MASK (0x1f << 0) |