diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-07-11 12:33:22 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-21 15:55:40 +0000 |
| commit | 399c022a8c6cba7ad6d75fdf377a690395877611 (patch) | |
| tree | 44a66a2fa6f7065e8c82289495b2df0e5065e972 /src/soc/intel/cannonlake/uart.c | |
| parent | 4cfae2f574c93c5640958fefa9f218c19e11399d (diff) | |
soc/intel/cannonlake: Add postcar stage support
Initialize postcar frame once finish FSP memoryinit
Change-Id: I888d471fa620b7fc9f8975524a31f662e1fc5079
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/20534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/uart.c')
| -rw-r--r-- | src/soc/intel/cannonlake/uart.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c index 6f5fb6d7e9..dd121b04a4 100644 --- a/src/soc/intel/cannonlake/uart.c +++ b/src/soc/intel/cannonlake/uart.c @@ -13,6 +13,8 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + #include <assert.h> #include <console/uart.h> #include <device/pci_def.h> @@ -60,8 +62,10 @@ void pch_uart_init(void) gpio_configure_pads(p->pads, ARRAY_SIZE(p->pads)); } +#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM) uintptr_t uart_platform_base(int idx) { /* We can only have one serial console at a time */ return UART_DEBUG_BASE_ADDRESS; } +#endif |