diff options
| author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2017-08-01 11:32:06 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-08-11 16:04:42 +0000 |
| commit | ae1548621acae99b7f7ac4a722607af0a4a0c825 (patch) | |
| tree | df032b9479804d2b0ab0452712c24f8858a23e53 /src/soc/intel/cannonlake/include | |
| parent | 7c8d331fbb0bb51af441f7e7615be2486e56c0d2 (diff) | |
soc/cannonlake: Enable SMM code for Cannon Lake
The minimum needed defines are included here and pm.h
will be updated when the PMC code for cannonlake is uploaded.
Change-Id: Idaf2be1258b3ec71fa449b88516bcb06c730d776
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/20849
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/pm.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h index d69250776c..66541228fe 100644 --- a/src/soc/intel/cannonlake/include/soc/pm.h +++ b/src/soc/intel/cannonlake/include/soc/pm.h @@ -20,6 +20,23 @@ #include <arch/acpi.h> #include <soc/pmc.h> +#define PM1_EN 0x02 +#define PWRBTN_EN (1 << 8) +#define GBL_EN (1 << 5) +#define SMI_EN 0x30 +#define ESPI_SMI_EN (1 << 28) +#define APMC_EN (1 << 5) +#define SLP_SMI_EN (1 << 4) +#define EOS (1 << 1) +#define GBL_SMI_EN (1 << 0) + + +#define GPE0_EN(x) (0x70 + ((x) * 4)) +#define PME_B0_EN (1 << 13) + +#define ENABLE_SMI_PARAMS \ + (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS) + struct chipset_power_state { uint16_t pm1_sts; uint16_t pm1_en; |