diff options
| author | John Zhao <john.zhao@intel.com> | 2019-04-22 10:45:51 -0700 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-05-11 11:16:48 +0000 |
| commit | 1159a163cd36318d27f8f3b71617ad4a5b781efb (patch) | |
| tree | 05f00bfd909ae3fb52669596e9e5f23ab096bf8b /src/soc/intel/cannonlake/chip.h | |
| parent | 4249348735d18cb2d44506090a675a29b0567e7f (diff) | |
soc/intel/cnl: Enable VT-d
Enable VT-d through fsp upd VtdDisable. Update remapping structure
types in numerical order as all remapping structures of type 0 (DRHD)
enumerated before remapping structures of type 1 (RMRR), and so forth.
BUG=b:130351429
TEST=Booted to kernel and verified the DMAR table contents.
Change-Id: I1d20932e417b9d324edd98c8f2195dc228d2e092
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index f34528a017..2b2a51f6a0 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -344,9 +344,6 @@ struct soc_intel_cannonlake_config { /* Enable Pch iSCLK */ uint8_t pch_isclk; - /* Intel VT configuration */ - uint8_t VtdDisable; - /* * Acoustic Noise Mitigation * 0b - Disable |