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authorDinesh Gehlot <digehlot@google.com>2023-01-17 05:12:07 +0000
committerElyes Haouas <ehaouas@noos.fr>2023-01-18 05:15:59 +0000
commit8a2c904616722f51f5d3a500ba41b7e21b4735e2 (patch)
treefa3ae71d1ce0338753eed7b23bd43feb64f065f7 /src/soc/intel/cannonlake/chip.c
parent5e2602ae4817eba77e7893ab41681fd0a74f6558 (diff)
soc/intel/cannonlake: Use common gpio.h include
Replace the intelblocks/gpio.h, soc/gpio.h and soc/gpio_defs.h includes with the common gpio.h which includes soc/gpio.h which includes intelblocks/gpio.h which includes soc/gpio_defs.h. This patch also fixes alphabetic ordering of included headers. BUG=b:261778357 TEST=Able to build and boot. Signed-off-by: Dinesh Gehlot <digehlot@google.com> Change-Id: I349a2b24ecdee347548b5c7b292c5075e6150a19 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72033 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.c')
-rw-r--r--src/soc/intel/cannonlake/chip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index c001e9847e..19b8c396b3 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -4,9 +4,9 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
+#include <gpio.h>
#include <intelblocks/acpi.h>
#include <intelblocks/cfg.h>
-#include <intelblocks/gpio.h>
#include <intelblocks/irq.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcie_rp.h>