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authorSubrata Banik <subratabanik@google.com>2022-01-28 21:46:22 +0530
committerSubrata Banik <subratabanik@google.com>2022-02-02 07:35:58 +0000
commitd6dbd9338c5c58e1546fe62c33901ae4a7f13261 (patch)
tree51933205558f394ad4dfd7fa3b8b1c521c6dfb53 /src/soc/intel/cannonlake/Kconfig
parentea47c6b580c039ea7f59a42e16d66c9987144444 (diff)
soc/intel/cannonlake: Use SBI msg to disable HECI1
Select HECI_DISABLE_USING_SMM config for Cannon Lake to disable HECI1 device using the SBI msg in SMM. BUG=none TEST=None Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I6882b619506d1bf4131f68c2c9a32ef4f7d6f6d7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61451 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Kconfig')
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 4a084a347d..f85cd156c3 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -109,6 +109,7 @@ config CPU_SPECIFIC_OPTIONS
config DISABLE_HECI1_AT_PRE_BOOT
default y if MAINBOARD_HAS_CHROMEOS
+ select HECI_DISABLE_USING_SMM
config MAX_CPUS
int