diff options
author | Lijian Zhao <lijian.zhao@intel.com> | 2017-07-11 12:33:22 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2017-07-21 15:55:40 +0000 |
commit | 399c022a8c6cba7ad6d75fdf377a690395877611 (patch) | |
tree | 44a66a2fa6f7065e8c82289495b2df0e5065e972 /src/soc/intel/cannonlake/Kconfig | |
parent | 4cfae2f574c93c5640958fefa9f218c19e11399d (diff) |
soc/intel/cannonlake: Add postcar stage support
Initialize postcar frame once finish FSP memoryinit
Change-Id: I888d471fa620b7fc9f8975524a31f662e1fc5079
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/20534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Kconfig')
-rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 1c0f1bffbe..483bb672b8 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -23,6 +23,8 @@ config CPU_SPECIFIC_OPTIONS select HAVE_INTEL_FIRMWARE select INTEL_CAR_NEM_ENHANCED select PLATFORM_USES_FSP2_0 + select POSTCAR_CONSOLE + select POSTCAR_STAGE select RELOCATABLE_RAMSTAGE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_BLOCK_SA |