ACPI: Add acpi_reset_gnvs_for_wake()

With chipset_power_state filled in romstage CBMEM hooks and
GNVS allocated early in ramstage, GNVS wake source is now
also filled for normal boot path.

Change-Id: I2d44770392d14d2d6e22cc98df9d1751c8717ff3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

2 files changed, 14 insertions, 31 deletions

diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index 377a4da77a..e6900d69c1 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -10,13 +10,11 @@
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <acpi/acpi.h>
-#include <acpi/acpi_gnvs.h>
 #include <cpu/x86/smm.h>
 #include <string.h>
 #include <soc/iobp.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>
-#include <soc/nvs.h>
 #include <soc/pch.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
@@ -603,12 +601,6 @@ static void pch_lpc_read_resources(struct device *dev)
 	pch_lpc_add_io_resources(dev);
 }
 
-void soc_fill_gnvs(struct global_nvs *gnvs)
-{
-	/* Set unknown wake source */
-	gnvs->pm1i = -1;
-}
-
 static unsigned long broadwell_write_acpi_tables(const struct device *device,
 						 unsigned long current,
 						 struct acpi_rsdp *rsdp)
diff --git a/src/soc/intel/broadwell/pch/ramstage.c b/src/soc/intel/broadwell/pch/ramstage.c
index a75bd36c99..54654e20e1 100644
--- a/src/soc/intel/broadwell/pch/ramstage.c
+++ b/src/soc/intel/broadwell/pch/ramstage.c
@@ -15,60 +15,51 @@
 static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_state *ps)
 {
 	uint16_t pm1;
-	int gpe_reg;
+	int gpe_reg, index;
 
 	pm1 = ps->pm1_sts & ps->pm1_en;
 
 	/* Scan for first set bit in PM1 */
-	for (gnvs->pm1i = 0; gnvs->pm1i < 16; gnvs->pm1i++) {
+	for (index = 0; index < 16; index++) {
 		if (pm1 & 1)
 			break;
 		pm1 >>= 1;
 	}
 
-	/* If unable to determine then return -1 */
-	if (gnvs->pm1i >= 16)
-		gnvs->pm1i = -1;
+	if (index < 16)
+		gnvs->pm1i = index;
 
 	/* Scan for first set bit in GPE registers */
-	gnvs->gpei = -1;
 	for (gpe_reg = 0; gpe_reg < GPE0_REG_MAX; gpe_reg++) {
 		u32 gpe = ps->gpe0_sts[gpe_reg] & ps->gpe0_en[gpe_reg];
 		int start = gpe_reg * GPE0_REG_SIZE;
 		int end = start + GPE0_REG_SIZE;
 
-		if (gpe == 0) {
-			if (!gnvs->gpei)
-				gnvs->gpei = end;
-			continue;
-		}
-
-		for (gnvs->gpei = start; gnvs->gpei < end; gnvs->gpei++) {
+		for (index = start; index < end; index++) {
 			if (gpe & 1)
 				break;
 			gpe >>= 1;
 		}
 	}
 
-	/* If unable to determine then return -1 */
-	if (gnvs->gpei >= (GPE0_REG_MAX * GPE0_REG_SIZE))
-		gnvs->gpei = -1;
-
-	printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
-	       gnvs->pm1i, gnvs->gpei);
+	if (index < GPE0_REG_MAX * GPE0_REG_SIZE)
+		gnvs->gpei = index;
 }
 
 static void acpi_save_wake_source(void *unused)
 {
 	const struct chipset_power_state *ps;
-	struct global_nvs *gnvs = acpi_get_gnvs();
-	if (!gnvs)
-		return;
+	struct global_nvs *gnvs;
 
+	if (acpi_reset_gnvs_for_wake(&gnvs) < 0)
+		return;
 	if (acpi_pm_state_for_wake(&ps) < 0)
 		return;
 
 	pm_fill_gnvs(gnvs, ps);
+
+	printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
+	       gnvs->pm1i, gnvs->gpei);
 }
 
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, acpi_save_wake_source, NULL);