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author | Angel Pons <th3fanbus@gmail.com> | 2021-10-11 13:53:15 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-12 17:37:26 +0000 |
commit | 0c7a25069e0d855013d082a87b5810c60336acb9 (patch) | |
tree | e451e7cb9ee146178c88ff5f70ad0d25be790e53 /src/soc/intel/broadwell | |
parent | 4d794bd4ec669966803a260c0056808ead4bb408 (diff) |
soc/intel/cannonlake: Lock PKG_CST_CONFIG_CONTROL MSR
Set PKG_CST_CONFIG_CONTROL MSR bit 15 to make bits 15:0 read-only.
Change-Id: Ia196906d3c2636742ae90160a224354e8df7863a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58220
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell')
0 files changed, 0 insertions, 0 deletions