diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2018-02-19 17:33:48 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-01 16:10:15 +0000 |
| commit | 81a6f109bab8f58984603fbd534e2548be290480 (patch) | |
| tree | a0b788ef08d7134dd4e22f4169b8d0caddc34b45 /src/soc/intel/broadwell/romstage/systemagent.c | |
| parent | e85e0f57acf1b1dfe86b54689cf89659bfd94a54 (diff) | |
soc/intel/broadwell: Enable VT-d and X2APIC
We use the usual static addresses 0xfed90000/0xfed91000 for the GFX
IOMMU and the general IOMMU respectively. These addresses have to be
configured in MCHBAR registers and reserved from the OS.
Change-Id: I7afcce0da028a160174db2cf6b4b6735bcd59165
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/23820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/broadwell/romstage/systemagent.c')
| -rw-r--r-- | src/soc/intel/broadwell/romstage/systemagent.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/romstage/systemagent.c b/src/soc/intel/broadwell/romstage/systemagent.c index e7dbbc8602..153dfdfe13 100644 --- a/src/soc/intel/broadwell/romstage/systemagent.c +++ b/src/soc/intel/broadwell/romstage/systemagent.c @@ -47,5 +47,26 @@ static const struct reg_script systemagent_early_init_script[] = { void systemagent_early_init(void) { + const bool vtd_capable = + !(pci_read_config32(SA_DEV_ROOT, CAPID0_A) & VTD_DISABLE); + reg_script_run_on_dev(SA_DEV_ROOT, systemagent_early_init_script); + + if (vtd_capable) { + /* setup BARs: zeroize top 32 bits; set enable bit */ + MCHBAR32(GFXVTBAR + 4) = GFXVT_BASE_ADDRESS >> 32; + MCHBAR32(GFXVTBAR) = GFXVT_BASE_ADDRESS | 1; + MCHBAR32(VTVC0BAR + 4) = VTVC0_BASE_ADDRESS >> 32; + MCHBAR32(VTVC0BAR) = VTVC0_BASE_ADDRESS | 1; + + /* set PRSCAPDIS, lock GFXVTBAR policy cfg registers */ + u32 reg32; + reg32 = read32((void *)(GFXVT_BASE_ADDRESS + ARCHDIS)); + write32((void *)(GFXVT_BASE_ADDRESS + ARCHDIS), + reg32 | DMAR_LCKDN | PRSCAPDIS); + /* lock VTVC0BAR policy cfg registers */ + reg32 = read32((void *)(VTVC0_BASE_ADDRESS + ARCHDIS)); + write32((void *)(VTVC0_BASE_ADDRESS + ARCHDIS), + reg32 | DMAR_LCKDN); + } } |