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| author | Marc Jones <marc.jones@se-eng.com> | 2014-12-26 22:11:14 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-31 21:22:24 +0100 |
| commit | a6354a1acadc7825364c6a6e7fd3b24a405a62a1 (patch) | |
| tree | c947844cc6568280240c8bdc225fa581b1ea23af /src/soc/intel/broadwell/romstage/cache_as_ram.inc | |
| parent | dffd892e47bb8bbfb920447275a2d6b00be904ce (diff) | |
broadwell: Preparations for building
Updated Intel Broadwell for differences in the source based on
the chromium tree. It is missing most of the recent updates
on coreboot.org.
- makefile changes for Elog and IDF tool
- kconfig changes for ME, ucode, and other updates
- update oprom flag
- update timestamp mechanism
- cbfs payload function is now generic
Change-Id: I82bd0792e9dcf81085246873164de6600528d6fe
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/7939
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/romstage/cache_as_ram.inc')
| -rw-r--r-- | src/soc/intel/broadwell/romstage/cache_as_ram.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/romstage/cache_as_ram.inc b/src/soc/intel/broadwell/romstage/cache_as_ram.inc index 029ab7caf4..4e6cf09f72 100644 --- a/src/soc/intel/broadwell/romstage/cache_as_ram.inc +++ b/src/soc/intel/broadwell/romstage/cache_as_ram.inc @@ -19,7 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <cpu/x86/stack.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> #include <cpu/x86/post_code.h> |