diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-09-24 16:50:05 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-10-14 08:36:43 +0000 |
commit | 2ead36334050ac692e64adc59a97320d8792adcc (patch) | |
tree | ca32a3b422b2be28268a390f65fe00bdc575914e /src/soc/intel/broadwell/pmutil.c | |
parent | 9bf45b43ee81ceed6c6545c6ccfb791cc28c8993 (diff) |
soc/intel/broadwell: Align cosmetics with Haswell/Lynx Point
Tested with BUILD_TIMELESS=1, Purism Librem 13v1 does not change.
Change-Id: Icf41d9db20e492ec77a83f8413ac99a654d6c8ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45697
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/pmutil.c')
-rw-r--r-- | src/soc/intel/broadwell/pmutil.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c index 92cf3637f9..c96ed18b8a 100644 --- a/src/soc/intel/broadwell/pmutil.c +++ b/src/soc/intel/broadwell/pmutil.c @@ -312,7 +312,7 @@ void enable_tco_sci(void) */ /* Clear a GPE0 status and return events that are enabled and active */ -static u32 reset_gpe(u16 sts_reg, u16 en_reg) +static u32 reset_gpe_status(u16 sts_reg, u16 en_reg) { u32 gpe0_sts = inl(ACPI_BASE_ADDRESS + sts_reg); u32 gpe0_en = inl(ACPI_BASE_ADDRESS + en_reg); @@ -366,10 +366,10 @@ u32 clear_gpe_status(void) [18] = "WADT" }; - print_gpe_gpio(reset_gpe(GPE0_STS(GPE_31_0), GPE0_EN(GPE_31_0)), 0); - print_gpe_gpio(reset_gpe(GPE0_STS(GPE_63_32), GPE0_EN(GPE_63_32)), 32); - print_gpe_gpio(reset_gpe(GPE0_STS(GPE_94_64), GPE0_EN(GPE_94_64)), 64); - return print_gpe_status(reset_gpe(GPE0_STS(GPE_STD), GPE0_EN(GPE_STD)), + print_gpe_gpio(reset_gpe_status(GPE0_STS(GPE_31_0), GPE0_EN(GPE_31_0)), 0); + print_gpe_gpio(reset_gpe_status(GPE0_STS(GPE_63_32), GPE0_EN(GPE_63_32)), 32); + print_gpe_gpio(reset_gpe_status(GPE0_STS(GPE_94_64), GPE0_EN(GPE_94_64)), 64); + return print_gpe_status(reset_gpe_status(GPE0_STS(GPE_STD), GPE0_EN(GPE_STD)), gpe0_sts_3_bits); } |