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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-10 17:03:32 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-26 10:53:16 +0000
commite742b68f1ac9324ce1f700323f1226e86d068a8c (patch)
treeb7fc74a0d5a1d6b3ba0773b59839d2bc15fddcb0 /src/soc/intel/broadwell/pch
parentae1b2d49cf0ad09ff8f1e3904a9e7b23d6fb423b (diff)
arch/x86/ioapic: Promote ioapic_get_sci_pin()
Platform needs to implement this to provide information about SCI IRQ pin and polarity, to be used for filling in ACPI FADT and MADT entries. Change-Id: Icea7e9ca4abf3997c01617d2f78f25036d85a52f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74337 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/broadwell/pch')
-rw-r--r--src/soc/intel/broadwell/pch/fadt.c2
-rw-r--r--src/soc/intel/broadwell/pch/lpc.c9
2 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/pch/fadt.c b/src/soc/intel/broadwell/pch/fadt.c
index 9355670b83..2ffebc3309 100644
--- a/src/soc/intel/broadwell/pch/fadt.c
+++ b/src/soc/intel/broadwell/pch/fadt.c
@@ -10,8 +10,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = 9;
-
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;
fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index 1ddee34122..9aaca215b8 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -36,6 +36,15 @@ static void pch_enable_ioapic(struct device *dev)
register_new_ioapic_gsi0(VIO_APIC_VADDR);
}
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
+{
+ *gsi = ACPI_SCI_IRQ;
+ *irq = ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
+}
+
static void enable_hpet(struct device *dev)
{
size_t i;