diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-14 12:14:48 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-06-16 14:47:45 +0000 |
| commit | dbdd528ffdd4748d5cb51dfa09217248c7919904 (patch) | |
| tree | 5360eb3aad4bcb86667e07a6f16e4578ca1496a3 /src/soc/intel/broadwell/pch | |
| parent | 1708a2fcc9a8e09d3e45327a3b31d4e7c7653c73 (diff) | |
soc/intel/broadwell: Separate PCH Kconfig
Split up PCH Kconfig into a separate file. While we're at it, also sort
selected options alphabetically.
Tested with BUILD_TIMELESS=1, coreboot.rom for the Purism Librem 13 v1
remains identical when not adding the .config file in it.
Change-Id: Ic3ff982e7108bf2d25a22e56ac2fbb93070df164
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/broadwell/pch')
| -rw-r--r-- | src/soc/intel/broadwell/pch/Kconfig | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/pch/Kconfig b/src/soc/intel/broadwell/pch/Kconfig new file mode 100644 index 0000000000..c743049ca2 --- /dev/null +++ b/src/soc/intel/broadwell/pch/Kconfig @@ -0,0 +1,68 @@ +config INTEL_LYNXPOINT_LP + bool + default y if SOC_INTEL_BROADWELL + +config PCH_SPECIFIC_OPTIONS + def_bool y + select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select ACPI_SOC_NVS + select AZALIA_PLUGIN_SUPPORT + select BOOT_DEVICE_SUPPORTS_WRITES + select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE + select HAVE_SMI_HANDLER + select HAVE_USBDEBUG + select INTEL_DESCRIPTOR_MODE_CAPABLE + select INTEL_LYNXPOINT_LP + select IOAPIC + select RTC + select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT + select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_RTC + select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 + select SPI_FLASH + +config EHCI_BAR + hex + default 0xd8000000 + +config SERIRQ_CONTINUOUS_MODE + bool + default y + help + If you set this option to y, the serial IRQ machine will be + operated in continuous mode. + +config PCIEXP_ASPM + bool + default y + +config PCIEXP_AER + bool + default y + +config PCIEXP_COMMON_CLOCK + bool + default y + +config PCIEXP_CLK_PM + bool + default y + +config PCIEXP_L1_SUB_STATE + bool + default y + +config SERIALIO_UART_CONSOLE + bool + default n + select DRIVERS_UART_8250MEM_32 + help + Selected by mainboards where SerialIO UARTs can be used to retrieve + coreboot logs. Boards also need to set UART_FOR_CONSOLE accordingly. + +config CONSOLE_UART_BASE_ADDRESS + default 0xd6000000 if SERIALIO_UART_CONSOLE |