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author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-16 01:37:34 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-19 13:14:00 +0000 |
commit | 3eaa850c6aed2df454007c059a3ca01496666c5a (patch) | |
tree | 5c1aeac9070d41e4c392ee5c260d52cf7798d1c6 /src/soc/intel/broadwell/pch/power_state.c | |
parent | a880720ee1820dcb3370cc0d19bf9004faaed9ee (diff) |
nb/amd/pi/00730F01/northbridge: drop nodeid from get_dram_base_limit
This APU is always a single-node and also only has one DRAM controller,
so there is only one valid DRAM base and limit register. It's also worth
mentioning that the assumption made in get_dram_base_limit that the n-th
node is using the n-tn DRAM range register was valid for K8, but not
necessarily on newer generations than that.
TEST=PC Engines APU2 still boots and doesn't show any new problems
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id0529c66e8d0e6c8eb42eec2c6d9d2e892287865
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79607
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/broadwell/pch/power_state.c')
0 files changed, 0 insertions, 0 deletions