diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-04-19 22:38:55 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-06-14 09:59:52 +0000 |
commit | 34bd6ba97917b0bc54bb1f1e106a56b5c03e19ac (patch) | |
tree | ee709d4ee9a572c4826eb50405262387c0f8a02d /src/soc/intel/broadwell/pch/adsp.c | |
parent | 68d8357dab55660058ad1ab8dca34fd03e0adbb5 (diff) |
soc/intel/broadwell/pch: Drop device NVS remainders
Now that device NVS is no longer used as such, stop using it to store
ACPI device settings consumed by the SSDT generator. Instead, provide
the get_acpi_device_state() function to allow saving ACPI device BARs
and activation state from other compilation units. Also, introduce an
enum and a struct to ease handling device state.
Tested on out-of-tree Compal LA-A992P, SerialIO SSDT does not change.
Change-Id: I9e70bf71e808651cb504399dcee489a4d1a70e67
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52521
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/pch/adsp.c')
-rw-r--r-- | src/soc/intel/broadwell/pch/adsp.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/src/soc/intel/broadwell/pch/adsp.c b/src/soc/intel/broadwell/pch/adsp.c index 040bba150e..b4b0257c11 100644 --- a/src/soc/intel/broadwell/pch/adsp.c +++ b/src/soc/intel/broadwell/pch/adsp.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -8,8 +7,6 @@ #include <device/pci_ops.h> #include <device/mmio.h> #include <soc/adsp.h> -#include <soc/device_nvs.h> -#include <soc/device_nvs.h> #include <soc/pch.h> #include <soc/ramstage.h> #include <soc/rcba.h> @@ -79,15 +76,14 @@ static void adsp_init(struct device *dev) pch_iobp_write(ADSP_IOBP_PMCTL, ADSP_PMCTL_VALUE); if (config->sio_acpi_mode) { - struct device_nvs *dev_nvs = acpi_get_device_nvs(); - /* Configure for ACPI mode */ printk(BIOS_INFO, "ADSP: Enable ACPI Mode IRQ3\n"); - /* Save BAR0 and BAR1 to ACPI NVS */ - dev_nvs->bar0[SIO_NVS_ADSP] = (u32)bar0->base; - dev_nvs->bar1[SIO_NVS_ADSP] = (u32)bar1->base; - dev_nvs->enable[SIO_NVS_ADSP] = 1; + /* Save BAR0 and BAR1 */ + struct pch_acpi_device_state *state = get_acpi_device_state(PCH_ACPI_ADSP); + state->enable = 1; + state->bar0 = (u32)bar0->base; + state->bar1 = (u32)bar1->base; /* Set PCI Config Disable Bit */ pch_iobp_update(ADSP_IOBP_PCICFGCTL, ~0, ADSP_PCICFGCTL_PCICD); |